BGT 24LTR22 E6327

BGT24LTR22 BGT24LTR22 Low Power Multichannel 24GHz Radar MMIC for Smart Sensing Applications Features  24 GHz transceiver MMIC (2 TX, 2 RX)  Fully integrated low phase noise VCO  Medium power amplifier with variable output power  Integrated power detectors  Homodyne low noise quadrature receivers  Configurable analog baseband amplification stages  Frequency divider  Low power consumption  Multimode operation (Master/Slave)  Fully ESD protected device  Single ended RF terminals  Single supply voltage 1.5V  WFWLB-52-3 pin plastic package sized 3.63mmx3.63mm  Pb-free (RoHS compliant) package Potential Applications  Smart home appliances  Drone collision avoidance  Traffic monitoring  Security applications Description BGT24LTR22 is a low power, low noise multi-channel Silicon Germanium transceiver MMIC for 24 GHz radar applications. It provides building blocks for analog signal generation and reception, operating in the frequency range from 24.0 GHz up to 24.25 GHz. Integrated digital blocks controlling the chip are implemented in order to support radar system design. The device is manufactured in Infineon’s B11HFC BiCMOS technology offering a cutoff frequency higher than 300GHz. It is housed in Infineons plastic embedded Wafer Level Ball Grid Array (eWLB) package which can be processed in standard SMT flow. Datasheet www.infineon.com Please read the Important Notice and Warnings at the end of this document page 1 of 15 V 1.0 2020-01-26 BGT24LTR22 Low Power Multichannel 24GHz Radar MMIC for Smart Sensing Applications Table of Content Table of Content Features ........................................................................................................................................ 1 Potential Applications ..................................................................................................................... 1 Description .................................................................................................................................... 1 Table of Content ............................................................................................................................. 2 1 1.1 1.2 1.3 1.4 1.5 1.6 Electrical Characteristics ........................................................................................................ 3 Absolute Maximum Ratings .................................................................................................................... 3 ESD Integrity ............................................................................................................................................ 4 Power Supply........................................................................................................................................... 4 TX Section ................................................................................................................................................ 4 RX Section ................................................................................................................................................ 5 Frequency Divider ................................................................................................................................... 6 2 2.1 SPI Interface .......................................................................................................................... 7 SPI Timing Requirements........................................................................................................................ 7 3 3.1 3.2 3.3 Block Diagram and Pin Description........................................................................................... 8 Block Diagram ......................................................................................................................................... 8 Pin Out ..................................................................................................................................................... 9 Pin Definition and Function .................................................................................................................... 9 4 Package Dimensions and Footprint ......................................................................................... 11 Datasheet 2 of 15 V 1.0 2020-01-26 BGT24LTR22 Low Power Multichannel 24GHz Radar MMIC for Smart Sensing Applications Electrical Characteristics 1 Electrical Characteristics Attention: Test ■ means that the parameter is not subject to production test. It was verified by design or characterization respectively. 1.1 Absolute Maximum Ratings Table 1 Absolute Maximum Ratings: TA = -40 °C .. 85°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Value Min. Supply voltage VDD DC voltage at RF pins Typ. Unit Max. Note/ Test Condition -0.3 - VDD,max +0.3 V VDC,RF 0 - 0 V DC voltage at VCO tuning pin VTUNE VTUNE 0 - 5 V Voltage applied to all other user I/O pins VDC,I/O -0.3 - VDD +0.3 V RF input power RX inputs PRF - - 0 dBm Total power dissipation PDISS - - 500 mW Storage temperature range TSTG -40 - 150 °C Operational temperature range TC -40 - +85 °C Temperature at package soldering point Thermal resistance of package Rth,P - 18 - K/W Represents bulk silicon to package solder balls DC-short at RF pins (RX1, RX2, TX1, TX2) to GND Pins RX1, RX2 Attention: Stresses exceeding the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Datasheet 3 of 15 V 1.0 2020-01-26 BGT24LTR22 Low Power Multichannel 24GHz Radar MMIC for Smart Sensing Applications Electrical Characteristics 1.2 ESD Integrity Table 2 ESD integrity Parameter Symbol ESD robustness HBM1 2 ESD robustness CDM Value Unit Note/ Test Condition Min. Typ. Max. VESD-HBM -1 - 1 kV All pins VESD-CDM -500 - 500 V All pins 1) According to ANSI/ESDA/JEDEC JS-001 (R = 1.5kOhm, C = 100pF) for Electrostatic Discharge Sensitivity Testing, Human Body Model (HBM)-Component Level 2) According to ESDA/JEDEC JS-002 Field-Induced Charged Device Model (CDM), Test Method for Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components Please note that this result is subject to: - lot variations within the manufacturing process as specified by Infineon - changes in the specific test setup 1.3 Power Supply Table 3 Power Supply Electrical Characteristics: TA = -40 °C .. 85 °C Parameter Symbol Value Min. Unit Typ. Max. 1.45 1.5 1.6 V Note/ Test Condition Supply voltage VDD Supply current nominal operation mode IDD_ON - 170 230 mA SPI Settings – Refer to AN607 Supply current in reduced power consumption mode IDD_RED - 135 - mA SPI Settings – Refer to AN607 Supply current standbymode IDD_STDBY - - 1 mA SPI Settings – Refer to AN607 1.4 TX Section Table 4 TX Section Electrical Characteristics: TA = -40 °C .. 85 °C, VDD = 1.45 V .. 1.6 V; all parameters are for master mode operation (unless otherwise specified) Parameter Symbol Value Min. Typ. Unit Max. Note/ Test Condition VCO frequency range fVCO 24.0 - 24.25 GHz VCO phase noise PN - -65 -85 -50 -70 dBc/Hz @10kHz offset @100kHz offset VCO AM noise PAM - -148 - dBc/Hz @100kHz offset Tuning voltage to cover VCO frequency range VTUNE 0 0.7 3 V Datasheet 4 of 15 ISM band covered from 0 V to 1.5 V V 1.0 2020-01-26 BGT24LTR22 Low Power Multichannel 24GHz Radar MMIC for Smart Sensing Applications Electrical Characteristics Table 4 TX Section Electrical Characteristics: TA = -40 °C .. 85 °C, VDD = 1.45 V .. 1.6 V; all parameters are for master mode operation (unless otherwise specified) Parameter Symbol Value Min. Typ. VCO tuning sensitivity within VCO frequency range f /VTUNE 500 VCO temperature drift within VCO frequency range f /T 2nd Harmonic suppression ∆Pfund,H2 VCO nonharmonic suppression Unit Max. 1600 3000 MHz/V - -5 - MHz/K 15 27 - dBc PSPUR - -55 -40 dBm TX output power1 PTX1 1 5 9.5 dBm TX output power dynamic range ∆POUT 17 24 - dB TX load impedance ZTX1 - 50 -  Note/ Test Condition Single-ended at outer edge of compensation structure on PCB as indicated in AN607 1.5 RX Section Table 5 RX Section Electrical Characteristics: TA = -40 °C .. 85 °C, VDD = 1.45 V .. 1.6 V; all parameters are within master mode operation (unless otherwise specified) Parameter Symbol Value Min. RX frequency range fRX Single-sideband noise figure1 NFSSB Typ. Unit Max. 24.0 - 24.25 GHz - 8 16.5 dB - 8.5 15.5 Note/ Test Condition @ fIF = 200 kHz – Bypass Mode SPI configurable – Refer to AN607 @ fIF = 200 kHz – ABB Mode SPI configurable – Refer to AN607 RF downconverter conversion gain1 GDC 16 25 33 dB @ fIF = 200 kHz – Bypass Mode SPI configurable – Refer to AN607 Analog baseband Gain GABB - 0/30/35/40/ 45/50/55/60 - dB Configurable via SPI Input 1 dB compression point IP1dB - -19 - dBm RX in Bypass Mode LO input power PLOIN - -10 - dBm For slave mode operation Refer to AN607 for more details about parameter variation over temperature Datasheet 5 of 15 1 V 1.0 2020-01-26 BGT24LTR22 Low Power Multichannel 24GHz Radar MMIC for Smart Sensing Applications Electrical Characteristics Table 5 RX Section Electrical Characteristics: TA = -40 °C .. 85 °C, VDD = 1.45 V .. 1.6 V; all parameters are within master mode operation (unless otherwise specified) Parameter Symbol Value Min. Typ. Unit Note/ Test Condition Max. Baseband high pass filters Fc-hpf cut off frequency - 20/50/80/100 - kHz Configurable via SPI 1st order, -3 dB definition Baseband low pass filters cut off frequency Fc-lpf - 600 - kHz 4th order, -3 dB definition Quadrature phase imbalance P -10 - 10 deg Quadrature amplitude imbalance A -1.5 - 1.5 dB IF output impedance ZIF - 400 -  Differential IF output impedance – Bypass Mode ZIFBY - 1 - k Differential IF output common mode voltage VIFCMD - 0.75 - V IF output power supply rejection ratio PSRR - 60 - dB @ DC RX input impedance ZRXIN - 50 -  Single-ended at outer edge of compensation structure on PCB as indicated in AN607 1.6 Frequency Divider Table 6 Frequency Divider Electrical Characteristics: TA = -40 °C .. 85 °C, VDD = 1.45 V .. 1.6 V, Freq = 24GHz Parameter Symbol Value Min. Typ. Unit Max. Note/ Test Condition Dividing factor 1 DDIV1 - 2^20 - - selectable via SPI Dividing factor 2 DDIV2 - 2^16 - - selectable via SPI Dividing factor 3 DDIV3 - 2^14 - - selectable via SPI Dividing factor 4 DDIV4 - 2^13 - - selectable via SPI Dividing factor 5 DDIV5 - 16 - - selectable via SPI Divider output power PDIV5 -13 -5 0 dBm Divider output voltage range VDIV 0 - VDD V For dividing factors 1 to 4 External capacitive load CextLoad - - 15 pF For dividing factors 1 to 4 Datasheet 6 of 15 For dividing factor 5 @50 Ohms load V 1.0 2020-01-26 BGT24LTR22 Low Power Multichannel 24GHz Radar MMIC for Smart Sensing Applications SPI Interface 2 SPI Interface 2.1 SPI Timing Requirements The BGT24LTR22 is configured using a 4-wire SPI interface. It is used to configure the internal modules of the BGT24LTR22 chip via registers. The main tasks are to set the mode of operation of the TX and/or RX chain and the baseband section. Communication with an external micro controller is done via the four dedicated pins SPIDI, SPIDO, SPICS and SPICLK. Figure 1 demonstrates how the timing of the SPI behaves. The “working edge” is the rising edge of the clock SPICLK. The master application processor presents data for BGT24LTR22 at the falling edge on SPIDI, BGT24LTR22 samples data at the rising edge. Read data is presented for the master on the rising edge on SPIDO. Refer to the application note AN607 for all details related to the SPI registers to control the MMIC. Note: Asynchronous reset (SPIRST) must be de-asserted at least 10 ns before the falling edge of SPICLK. tL tch T tT tcl SPICS SPICLK SPIDI SPIDO tds Figure 1 Table 7 tmis tmih tmos tdh tmoh SPI timing diagram SPI Interface timing requirements Parameter Symbol Values Min. Typ. Max. 20 Unit SPI clock period T Clock high time tch 9 ns Clock low time tcl 9 ns Setup time SPIDI Hold time SPIDI Setup time SPIDO tmos tmoh tmis tmih 5 5 5 ns ns ns 1 ns ns Hold time SPIDO Delay time from the output pad logic Datasheet 5 tpad_out_dly 7 of 15 ns Note / Test Condition 50MHz, with